1. Field of the Invention
The present invention relates to a method of forming a polycide layer in a semiconductor device and, more particularly, to a method of forming a polycide layer in a semiconductor device which can prevent an external diffusion of impurity ions contained in a doped polysilicon layer so that an electrical characteristic of device can be improved.
2. Description of the Prior Arts
In comparing with a polysilicon, a tungsten silicide layer (WSi.sub.x) used for a wiring in a manufacturing process of a semiconductor device has excellent electrical specific resistance and thermal stability. Therefore, in case where any other fire-resistive metal compounds can not be used due to a subsequent high temperature process, the tungsten silicide layer may be used as a local interconnection materials. However, since the tungsten silicide layer has a poor adhesive force with an oxide, in most case, a polycide structure in which a tungsten silicide layer is deposited on a polysilicon is used.
As an example of a conventional method of forming a polycide layer in a semiconductor device, a method of forming a bit line will be now explained as follows.
FIG. 1 and FIG. 3 are cross-sectional views of device for explaining a conventional method of forming a polycide layer in a semiconductor device.
Referring to FIG. 1, an insulating layer 3 is formed on a silicon substrate 1 in which a junction 2 is formed, the insulating layer 3 is patterned to expose the junction 2 and thus a contact hole is formed. Then, a doped polysilicon layer 4 is deposited on the entire structure, a tungsten silicide layer 5 is deposited on the doped polysilicon layer 4. Therefore, a polycide layer 6 consisted of the doped polysilicon layer 4 and the tungsten silicide layer 5 is formed.
Here, the polycide layer 6 may be formed by means of two methods. The doped polysilicon layer 4 and the tungsten silicide layer 5 are deposited in in-situ method in an apparatus under vacuum, or the doped polysilicon layer 4 and the tungsten silicide layer 5 are deposited in different apparatuses, respectively. However, in case of the former, if the doped polysilicon layer 4 and the tungsten silicide layer 5 are experienced with a subsequent annealing process, impurity ions 7 such as phosphorous (P) contained within the doped polysilicon layer 4 will be diffused into the junction 2 and the tungsten silicide layer 5 as shown in FIG. 2 which is an enlarged view of the A portion in FIG. 1. Therefore, due to the diffusion of the impurity ions 7, the depth of the connection 2 will be altered. In addition, since the impurity ions 7 penetrated into the grain boundary of the tungsten silicide layer 5 resists a flow of current during operation of the device, the resistance of the tungsten silicide layer 5 will be increased.
Also, in case of the latter, a pre-cleaning process is performed after depositing the doped polysilicon layer 5, and then the tungsten silicide layer 5 is deposited. Therefore, an oxide film 8 is formed between the doped polysilicon layer 4 and the tungsten silicide layer 5 as shown in FIG. 3. During a subsequent annealing process, although the diffusion of the impurity ions 7 can be prevented by the oxide film 8, the steps of the process will become complicated, thereby lowering the yield.